1. Field of the Invention
The invention relates to a metal oxide semiconductor transistor, and in particular to a laterally diffused metal oxide semiconductor transistor.
2. Description of the Related Art
With rapid growth in the use of wireless communication products such as mobile phones and base stations, laterally diffused metal oxide semiconductor (LDMOS) transistors based on complementary metal oxide semiconductor (CMOS) structures used in radio frequency (900 MHz˜2.4 GHz) circuits have been developed. Such devices with high operating bandwidth, high breakdown voltage, and high output power are suitable for use in power amplifier of wireless communication base station.
FIG. 1 is a cross section of a conventional laterally diffused metal oxide semiconductor transistor. In the device, a source 1 and a drain 2 are extended to form an N+ region 3. The N+ region 3 underneath the drain 2 is diffused to form an N-drift region 4. The N+ region 3 is an N-type heavy-doped region. The N-drift region 4 is an N-type lightly doped region. Various concentrations and lengths of the N-drift region 4 affect the breakdown voltage and resistance of the device. When concentration decreases and length increases, the breakdown voltage and resistance thereof increase. A P-body 5 represents a channel. The doped concentration of the P-body 5 is altered to control the threshold voltage. Additionally, a P-sink 6, a P-type heavy-doped region, is connected with the source 1 and a substrate 7 to reduce the parasitic capacitance therebetween, improving heat dissipation. A P-well 8, a lighter P-type doped region, serves as an epitaxy layer of the substrate 7. An oxide layer underneath the gate 9 represents a gate oxide layer 11. The threshold voltage is affected by the thickness thereof.
The N-drift region with low concentration and large area surrounding the N+ region underneath the drain effectively reduces the breakdown between the drain and source, facilitating operation of high-voltage devices.
Unlike the metal oxide semiconductor transistor, the laterally diffused metal oxide semiconductor transistor replaces the heavy-doped region with a lightly doped N-drift region to buffer the most voltage drops applied from the drain to obtain the high breakdown voltage.
The laterally diffused metal oxide semiconductor transistor layout also affects the breakdown voltage. Referring to FIG. 2, a drain 2 is formed on the center of the layout pattern. A source 1 and a gate 9 formed thereon then surround the drain 2 to form a closed structure. The corners of the layout pattern, however, may cause excessive current concentration and deteriorate heat dissipation, resulting in second breakdown.
Another laterally diffused metal oxide semiconductor transistor layout including addition of parallel numbers and length of transistors 13 also decreases the breakdown voltage, as shown in FIG. 3.
Thus, a LDMOS transistor layout with reduced current density and increased breakdown voltage and heat dissipation is desirable.